Talking with journalists from Anandtech portal AMD chief executive Lisa Su once more confirmed that the Zen 4 processors will use 5nm production process technology. In addition, Ms. Su for the first time reported that the processors on the new architecture will use chipsets in 2D-and 3D-layout. This could mean that some processors on Zen 4 could get 3D V-Cahce cache.
Journalists asked why AMD decided to use TSMC's 5nm process, while some companies, including mobile, are already using 4nm and will soon be switching to 3nm chips. Lisa Su explained that for certain tasks use their own processes. If we talk about the Zen 4 architecture, the most appropriate would be to use the 5-nm process, as it is optimized for high-performance computing. The fact that TSMC has three versions of 7nm process already hints at the fact that the most advanced nodes are not a universal choice for the production of all types of chips. By the way, TSMC said it has already accepted advance payments for $5.44 billion in orders from 10 customers, including AMD, Apple, NVIDIA and Qualcomm. With these payments, they have reserved manufacturing slots for their products at TSMC's facilities. In the first three quarters of last year, the contract chipmaker received advance payments of $3.8 billion. According to TSMC, the volume of such deals will increase as long as demand in the electronics market exceeds supply.