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AMD EPYC Genoa server processors will get up to 96 Mbytes of L2 cache - 1 Mbyte per core

AMD EPYC Genoa server processors will get up to 96 Mbytes of L2 cache - 1 Mbyte per core

Popular benchmark Geekbench has released information about one of AMD EPYC Genoa generation processors: these chips will be used in servers and high performance computing systems. The official presentation of the products is expected in the second half of this year.

The processors will be based on the Zen 4 microarchitecture. Chips will be manufactured at TSMC using 5-nm technology. Claimed 1.25 times higher performance compared to 7-nm solutions.

The Genoa processor, codenamed 100-000000479-13, made its mark in the Geekbench test. It has 32 cores that can process up to 64 instruction threads simultaneously. The base clock frequency is 1.2 GHz, the maximum frequency & ; 3.4 GHz.

Benchmark says that Genoa processors will get 1 Mbyte of level 2 (L2) cache per core. L1 cache size is 32 Kbytes for instructions and data, L3 cache size & ; 4 Mbytes per core.

The Genoa family will include products with up to 96 processing cores. The chips will support DDR5-5200 RAM.

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