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AMD Zen 4 processors will have twice as much L2 cache as their predecessors

AMD Zen 4 processors will have twice as much L2 cache as their predecessors

A fresh leak from the Geekbench synthetic test database indicates that AMD's Zen 4 server processors will get 1 Mbyte of L2 cache per core. This is confirmed by tests of an engineering sample of one of the EPYC Genoa series processors. Since AMD Ryzen desktop processors are made up of the same chipsets as the EPYC server chips, the presence of doubled L2 cache memory will probably be true for the Ryzen 7000 models on Zen 4 as well.

The aforementioned Genoa series chip with OPN number 100-000000479-13 has 32 physical cores on board with support for 64 virtual threads, and runs at a base frequency of 1.2 GHz. Considering that this is a very early engineering sample, it's safe to assume that the market version of the processor will have a much higher frequency. According to Geekbench data, the tested chip has one megabyte of L2 cache per core, which is twice the size of Naples, Rome and Milan series EPYC processors. At the same time the new chip has 32 Mbytes of L3 cache per chip compared to the same Milan series processor (CCX unit with 8 cores). But since Genoa series processors will be able to offer up to 96 physical cores, the total L3 cache volume will in any case be higher than that of their predecessors. The only exception will be the newer EPYC Milan-X chips, with 3D V-Cache technology, which triples the cache size. It should be recalled that EPYC 7004 (Genoa) processors will be manufactured according to the 5-nm process technology. They will be the first AMD server processors, which will support DDR5 RAM, as well as PCIe 5.0 interface. According to AMD, these chips should go on sale this year. The company's partners are already receiving samples for testing.

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